1. Technical Field
The present invention relates to semiconductor devices, and more particularly, to resistance change memory devices.
2. Description of the Related Art
Currently, a flash memory device commercialized as a resistance change memory device is based on change in threshold voltage resulting from storage or removal of charges from a charge storage layer. The charge storage layer may be a floating gate formed of a polysilicon layer or a charge trap layer formed of a silicon nitride layer. Recently, studies have been made to develop next generation resistance change memory devices which have lower power consumption and a higher degree of integration than the flash memory device. Examples of the next generation resistance change memory devices include a phase change random access memory (PRAM), a magnetic RAM (MRAM), and a resistive random access memory (ReRAM).
In order to realize a resistance change memory array using resistance change memory devices, a resistance change device acting as a memory device and a selection device connected to the resistance change device are generally used. The selection device may be a transistor or a diode. However, the transistor has a limit in size reduction due to a short channel effect such as punch through. In addition, since the diode allows only unidirectional electric current, the diode is not suitable for a bipolar device which exhibits resistance change characteristics at both polarities as in the resistance change device.
Further, such a selection device is formed through many additional processes. For example, the transistor is fabricated by forming a gate electrode, source/drain regions, and source/drain electrodes. Further, the diode is fabricated by forming an n-type semiconductor and a p-type semiconductor, and an electrode for connection with the resistance change device.